Top Company Seeking DFT Engineer
The DFT Engineer is responsible for defining the DFT architecture, implementing and verifying all DFT features in complex SoCs. Specific job functions include, but are not limited to, the following:
- Define chip level DFT architecture including scan, JTAG, SRAM built-in self test and built-in self repair, hard IP tests, and high speed interface testing
chip level debug support features for chip level and system level debug
- Implement and verify all DFT feature
- Generate all silicon bringup and production test vectors with high coverage
- Participate in silicon bringup on the ATE and in system
- Support test engineering and product engineering teams in bringing SoC products to production
- Strong working knowledge of all state of the art DFT techniques, including various scan implementation techniques, JTAG, IEEE P1500, and high speed interface testing
- Strong working knowledge of state of the art DFT and ATPG tools and their limitations
- Deep understanding of various SRAM test and repair algorithms
- Strong familiarity in silicon bringup on ATE
- Experience in using DFT for silicon debug in system
- Strong hands on logic design and simulation capabilities
- Proven ability to work with diverse technical teams ranging from SoC architect, front-end design and functional verification, timing, test/product engineering, and system validation
- 7+ years relevant industry experience
- MS/PhD strongly preferred
Please send a WORD VERSION of your resume to the following address:
Feel free to contact me directly at 408-641-1751
We look forward to hearing from you!
If you do not feel this position is a perfect match for please contact us in regards to out other positions. We have numerous needs in this area and welcome the opportunity to discuss your background.
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