DFT- Lead/ Sr. Engineer/ Engineer· Bangalore, India
DFT- Lead/ Sr. Engineer/ Engineer
Bangalore, India
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Job Description
DFT Engineer (2-10 Yrs) with B.Tech/ Masters Degree in Electronics.
# Should have handled chip-level hierarchical DFT insertion with Sound knowledge of Scan, MBIST & JTAG.
# Create Test plan for Complex ASICs & drive the DFT implementation & Verifi
# Should have handled chip-level hierarchical DFT insertion with Sound knowledge of Scan, MBIST & JTAG.
# Create Test plan for Complex ASICs & drive the DFT implementation & Verifi
Role:
Team Lead/ Technical Lead
Strong 2 -10 Yrs hands on DFT Exp.
Full-chip DFT exp handling large complex ASIC/SoC & at least one SoC tapeout.
Block & Chip level ATPG, Fault coverage improvements & simulation with Timing
Scan failures/blockage, DFT DRC failures, Timing failure
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