Verification Engineer MTS @ SMTS (closed)
Verification: Understanding design specifications and creating test plans; developing test benches and writing test cases
Running zero/unit delay simulations, gate level simulations, lint, code and functional coverage tools
System Verilog, eSpecmansynthesis, DFT, timing analysis and formal verification activities; Interface with back-end teams Lead, supervise and mentor verification engineers
Ability to interface with silicon companies and understand their requirements and expectations
Rapidly adapt to different design and verification environments
Coordinate efforts with offshore design and verification teams
Strong experience using Verilog/VHDL, System Verilog, eSpecman, Vera, PERL, C/C++
Working exp on ARM/MIPS/PPC processors;PCIE,USB2.0,DDR2/DDR3 IPs;AXI/AHB/APB/PLB system bus
We are looking for senior engineers with strong ASIC/SOC verification expertise.
He/She will be part of the ASIC front-end team, providing ASIC verification services to a wide range of silicon companies.
He/She will have the opportunity to work in a variety of projects in various market segments (automotive, networking,
wireless, communications, mobile/consumer electronics and other areas).
Experience - 6 to 12 year
If you are interested, kindly send me your updated resume along with details below,
For any further queries you can get in touch with me on the phone numbers below.
| Sr. IT Recruiter | SigmaEdge | Office: +91 40 4067 4453 | Mobile: +91 9908 131 679 |Fax:+91 40 4067 4445 | email: firstname.lastname@example.org|
| SigmaEdge Software Consulting (P) Ltd | 9-1-127/3, 43, S D Road, Secunderabad - 500 003 | Web: www.sigmaedge.com|