SoC and ASIC Design and Verification Engineer
Austin Silicon Technology Team is expanding and with our Google acquisition and recent LTE Android phone releases, it’s an exciting time to be a Motorolan.
Responsibilities include digital design, RTL coding, functional verification (including test bench development), synthesis, formal verification, static timing analysis, and/or power estimation. Project deliverables include RTL code, timing constraints, test benches, netlists, and associated documentation.
BS or MS degree in electrical engineering with experience in VHDL and/or Verilog coding, RTL simulation, synthesis, formal verification, static timing analysis, power estimation, and/or advanced EDA tools (e.g., Synopsys, Cadence, Magma).
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